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Reduced LUT Count for N16 to LUT_703

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amit.b пре 3 година
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1 измењених фајлова са 105 додато и 125 уклоњено
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  1. +105
    -125
      sources_1/imports/Downloads/sc_decoder_fsm.sv

+ 105
- 125
sources_1/imports/Downloads/sc_decoder_fsm.sv Прегледај датотеку

@@ -1,4 +1,4 @@
`timescale 1ns / 1ns
/*`timescale 1ns / 1ns
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
@@ -30,37 +30,47 @@ output logic out_valid
);


//function for fminsum calculation
// Function to calculate f(r1,r2) = sgn(r1) * sgn(r2) * min(|r1|,|r2|)
function void fminsum_calc;
input signed [`BITS-1:0] a;
input signed [`BITS-1:0] b;
output signed [`BITS-1:0] c;
input signed [`BITS-1:0] a;
input signed [`BITS-1:0] b;
output signed [`BITS-1:0] c;
logic [`BITS-2:0] abs_a;
logic [`BITS-2:0] abs_b;
logic [`BITS-2:0] abs_c;

abs_a = (a[`BITS-1] == 1) ? ~a[`BITS-2:0] + 1 : a[`BITS-2:0];
abs_b = (b[`BITS-1] == 1) ? ~b[`BITS-2:0] + 1 : b[`BITS-2:0];
// Mod value of a and b
abs_a = (a[`BITS-1]) ? ~a[`BITS-2:0] + 1'b1 : a[`BITS-2:0];
abs_b = (b[`BITS-1]) ? ~b[`BITS-2:0] + 1'b1 : b[`BITS-2:0];
// Multiplication of sign i.e. XOR
c[`BITS-1] = a[`BITS-1] ^ b[`BITS-1];
// Minimum value between a and b
abs_c = (abs_b < abs_a) ? abs_b : abs_a;
c[`BITS-2:0] = (c[`BITS-1] == 1) ? ~abs_c + 1 : abs_c;
endfunction
// Final Minsum of a and b
c[`BITS-2:0] = (c[`BITS-1]) ? ~abs_c + 1'b1 : abs_c;
endfunction
//function for g-value calculation
function void g_calc;
input signed [`BITS-1:0] a;

// Function to Calculate g(r1,r2,u) = r2 + ((1-2u) * r1)
function void g_calc;
input signed [`BITS-1:0] a;
input signed [`BITS-1:0] b;
input u;
output signed [`BITS:0] c;
c = (u == 0) ? (b + a) : (b + (~a+1));
endfunction
// when u == 0 => c = b - a
// When u == 1 => c = b + a
c = u ? (b + (~a+1)) : (b + a) ;
endfunction


//parameters and signals declarations
localparam d=$clog2(N); //N=4, d=2(0 & 1)
localparam n=2*N-1; //(2**d)-1;
localparam cmax=0;
logic [N-1:0]u;
logic [d:0]temp_index_f,temp_index_g;
reg signed [BITS-1:0] LRU[2];
@@ -76,7 +86,7 @@ logic [4:0] c_state, n_state;

wire [N-1:0]u_cap_1;
wire [N-1:0]v_final_1;
wire out_valid_1;
//wire out_valid_1;

//Auxiliary registers declarations
@@ -115,8 +125,8 @@ for(genvar i=0; i<N; i++)
end
assign v_final_1 = v;
assign out_valid_1 = (n_state == state_lnode) ? 1'b1 : 1'b0;
//assign out_valid=(n_state==state_last)?1'b1:1'b0;
// assign out_valid_1 = (n_state == state_lnode) ? 1'b1 : 1'b0;
assign out_valid=(n_state==state_last)?1'b1:1'b0;


// Sequential Logic - FSM State and Data Registers
@@ -126,7 +136,6 @@ begin
begin
u_cap <= 'b0;
v_final <= 'b0;
out_valid <= 'b0;
c_state <= idle;
depth_reg<=0;
@@ -138,8 +147,8 @@ begin
end
else
begin
out_valid <= out_valid_1;
v_final <= v_final_1;
// out_valid <= out_valid_1;
// v_final <= v_final_1;
if(out_valid)
begin
u_cap <= u;
@@ -193,23 +202,21 @@ begin
n_state=wait_L;
end
wait_L: begin
if(counter==cmax) begin
counter=counter_reg-cmax;
n_state=state_L;
end
else
counter=counter_reg+1;
end
state_L: begin
ena_L=1;wea_L=1;enb_L=0;
ena_v=0;wea_v=0; enb_v=0;
tmp_L=tmp_L_reg+1;
temp_index_f=((N/(2**(depth+1)))*((2*(node)+1)-((2**(depth+1))-1)));
// temp_index_f=((N>>(2**(depth+1)))*((2*(node)+1)-((2**(depth+1))-1)));
jL1=(tmp_L_reg)+temp_index_f;
jL2=(tmp_L_reg)+temp_index_f+(N/(2**depth));
// jL2=(tmp_L_reg)+temp_index_f+(N>>(2**depth));
fminsum_calc(L_out[jL1],L_out[jL2],L_in[jL1]);
if(tmp_L< (N/(2**depth)))
// if(tmp_L< (N>>(2**depth)))
n_state=state_L;
else if(depth<d)
n_state=wait_L_logic;
@@ -224,12 +231,7 @@ begin
wait_R: begin
ena_L=0;wea_L=0;enb_L=1;
ena_v=0;wea_v=0; enb_v=1;
if(counter==cmax) begin
counter=counter_reg-cmax;
n_state=state_R;
end
else
counter=counter_reg+1;
end
state_R: begin
@@ -237,16 +239,13 @@ begin
ena_v=0;wea_v=0; enb_v=0;
tmp_R=tmp_R_reg+1;
temp_index_f=((N/(2**(depth+1)))*((2*(node)+1)-((2**(depth+1))-1)));
// temp_index_f=((N>>(2**(depth+1)))*((2*(node)+1)-((2**(depth+1))-1)));
temp_index_g=((N/(2**(depth+1)))*((2*(node-1)+1)-((2**(depth+1))-1)));
// temp_index_g=((N>>(2**(depth+1)))*((2*(node-1)+1)-((2**(depth+1))-1)));
jR1=(tmp_R_reg)+temp_index_g;
jR2=(tmp_R_reg)+temp_index_g+(N/(2**depth));
// jR3=(tmp_R_reg)+temp_index_f;
jR3=(tmp_R_reg)+temp_index_f;
g_calc(L_out[jR1],L_out[jR2],v_out[jR1],L_in[jR3]);
if(tmp_R< (N/(2**depth)))
// if(tmp_R< (N>>(2**depth)))
n_state=state_R;
else if(node==((2**d)-2))
n_state=wait_lnode_logic;
@@ -258,25 +257,18 @@ begin
wait_U_logic: begin
depth=depth_reg-1; node=(node_reg-2)/2; tmp_U=0;
// depth=depth_reg-1; node=(node_reg-2)>>1; tmp_U=0;
n_state=wait_U;
end
wait_U: begin
ena_L=0;wea_L=0;enb_L=0;
ena_v=0;wea_v=0; enb_v=1;
if(counter==cmax) begin
counter=counter_reg-cmax;
n_state=state_U;
end
else
counter=counter_reg+1;
end
state_U: begin
ena_L=0;wea_L=0;enb_L=0;
ena_v=1;wea_v=1; enb_v=0;
tmp_U=tmp_U_reg+1;
temp_index_f=((N/(2**(depth)))*((2*node+1)-((2**(depth))-1)));
// temp_index_f=((N/(2**(depth)))*(((node+1)<< 1)-((2**(depth))-1)));
jU1=(tmp_U_reg)+temp_index_f;
jU2=(tmp_U_reg)+temp_index_f+(N/(2**(depth)));
v_in[jU1] = v_out[jU1] ^ v_out[jU2];
@@ -293,25 +285,21 @@ begin
n_state=wait_lstate_logic;
end
wait_LRU_logic: begin
// depth=depth_reg; node=(node_reg-1)/2;
depth=depth_reg; node=(node_reg-1)>>1;
depth=depth_reg; node=(node_reg-1)/2;
// depth=depth_reg; node=(node_reg-1)>>1;
n_state=wait_LRU;
end
wait_LRU: begin
ena_L=0;wea_L=0;enb_L=1;
ena_v=0;wea_v=0; enb_v=0;
if(counter==cmax) begin
counter=counter_reg-cmax;
n_state=state_LRU;
end
else
counter=counter_reg+1;
end
state_LRU: begin
ena_L=0;wea_L=0;enb_L=0;
ena_v=1;wea_v=1; enb_v=0;
temp_index_f=((N/(2**(depth)))*((2*node+1)-((2**(depth))-1)));
// temp_index_f=((N>>(2**(depth)))*((2*node+1)-((2**(depth))-1)));
fminsum_calc(L_out[temp_index_f],L_out[temp_index_f+1],LRU[0]);
// u[(2*node)+2-N]=(f[(2*node)+2-N]==1) ? 0 : ((LRU[0][BITS-1] == 1) ? 1 : 0);
u[(2*node)+2-N]=(f[(2*node)+2-N]) ? 0 : ((LRU[0][BITS-1]) ? 1 : 0);
@@ -334,17 +322,13 @@ begin
wait_lnode: begin
ena_L=0;wea_L=0;enb_L=1;
ena_v=0;wea_v=0; enb_v=0;
if(counter==cmax) begin
counter=counter_reg-cmax;
n_state=state_lnode;
end
else
counter=counter_reg+1;
end
state_lnode: begin
ena_L=0;wea_L=0;enb_L=0;
ena_v=1;wea_v=1; enb_v=0;
temp_index_f=((N/(2**(depth)))*((2*node+1)-((2**(depth))-1)));
// temp_index_f=((N>>(2**(depth)))*((2*node+1)-((2**(depth))-1)));
fminsum_calc(L_out[temp_index_f],L_out[temp_index_f+1],LRU[0]);
// u[(2*node)+2-N]=(f[(2*node)+2-N]==1) ? 0 : ((LRU[0][BITS-1] == 1) ? 1 : 0);
u[(2*node)+2-N]=(f[(2*node)+2-N]) ? 0 : ((LRU[0][BITS-1]) ? 1 : 0);
@@ -362,12 +346,7 @@ begin
wait_lstate: begin
ena_L=0;wea_L=0;enb_L=1;
ena_v=0;wea_v=0; enb_v=0;
if(counter==cmax) begin
counter=counter_reg-cmax;
n_state=state_last;
end
else
counter=counter_reg+1;
end
state_last: begin
ena_L=0;wea_L=0;enb_L=0;
@@ -379,8 +358,8 @@ begin
else n_state = idle;
end
endmodule
*/

/*

`timescale 1ns / 1ns
//////////////////////////////////////////////////////////////////////////////////
@@ -403,7 +382,7 @@ endmodule
//
//////////////////////////////////////////////////////////////////////////////////
`define BITS 8
module sc_decoder_fsm #(parameter BITS=8, N=11'd16)(
module sc_decoder_fsm #(parameter BITS=8, N=11'd32)(
input clk, rst,
input in_valid,
input signed [N-1:0][BITS-1:0] y,
@@ -424,11 +403,11 @@ function void fminsum_calc;
logic [`BITS-2:0] abs_b;
logic [`BITS-2:0] abs_c;

abs_a = (a[`BITS-1] == 1) ? ~a[`BITS-2:0] + 1 : a[`BITS-2:0];
abs_b = (b[`BITS-1] == 1) ? ~b[`BITS-2:0] + 1 : b[`BITS-2:0];
abs_a = (a[`BITS-1]) ? ~a[`BITS-2:0] + 1'b1 : a[`BITS-2:0];
abs_b = (b[`BITS-1]) ? ~b[`BITS-2:0] + 1'b1 : b[`BITS-2:0];
c[`BITS-1] = a[`BITS-1] ^ b[`BITS-1];
abs_c = (abs_b < abs_a) ? abs_b : abs_a;
c[`BITS-2:0] = (c[`BITS-1] == 1) ? ~abs_c + 1 : abs_c;
c[`BITS-2:0] = (c[`BITS-1]) ? ~abs_c + 1'b1 : abs_c;
endfunction
@@ -438,13 +417,13 @@ function void fminsum_calc;
input signed [`BITS-1:0] b;
input u;
output signed [`BITS:0] c;
c = (u == 0) ? (b + a) : (b + (~a+1));
c = (u == 0) ? (b + a) : (b + (~a+1'b1));
endfunction

//parameters and signals declarations
localparam d=$clog2(N); //N=4, d=2(0 & 1)
localparam n=2*N-1; //(2**d)-1;
localparam cmax=0;
//localparam n=2*N-1; //(2**d)-1;
//localparam cmax=0;
logic u[N];
logic [d:0]temp_index_f,temp_index_g;
reg signed [BITS-1:0] LRU[2];
@@ -453,7 +432,7 @@ logic [N-1:0][BITS-1:0]L_in, L_out;
logic [N-1:0]v_in, v_out;
logic ena_v,enb_v,wea_v;
logic ena_L,enb_L,wea_L;
logic [1:0]counter,counter_reg;
//logic [1:0]counter,counter_reg;
logic [11:0]jL1,jL2,jR1,jR2,jR3,jU1,jU2;
logic [4:0] c_state, n_state;

@@ -503,7 +482,7 @@ begin
c_state <= idle;
depth_reg<=0;
node_reg<=0;
counter_reg<=0;
// counter_reg<=0;
tmp_L_reg<=0;
tmp_R_reg<=0;
tmp_U_reg<=0;
@@ -513,7 +492,7 @@ begin
c_state <= n_state;
depth_reg<=depth;
node_reg<=node;
counter_reg<=counter;
// counter_reg<=counter;
tmp_L_reg<=tmp_L;
tmp_R_reg<=tmp_R;
tmp_U_reg<=tmp_U;
@@ -523,13 +502,15 @@ end
//Combinational Logic - FSM Next State Logic
always_comb
begin
if(in_valid==1)
if(in_valid)
case(c_state)
idle: begin
depth=0; node=0; counter=0; tmp_L=0; tmp_R=0; tmp_U=0;
depth=0; node=0;
//counter=0;
tmp_L=0; tmp_R=0; tmp_U=0;
ena_L=0;wea_L=0;enb_L=0;
ena_v=0;wea_v=0; enb_v=0;
if(out_valid==1)
if(out_valid)
n_state=idle;
else
n_state=root;
@@ -537,7 +518,7 @@ begin
root: begin
depth=depth_reg;node=node_reg;
ena_L=1;wea_L=1;enb_L=0;
ena_L=1'b1;wea_L=1'b1;enb_L=0;
ena_v=0;wea_v=0; enb_v=0;
for(int k=0; k<N; k++)
L_in[k]=y[k];
@@ -545,24 +526,24 @@ begin
end
wait_L_logic:
begin
depth=depth_reg+1; node=((2*node_reg)+1); tmp_L=0;
depth=depth_reg+1'b1; node=((2*node_reg)+1'b1); tmp_L=0;
ena_L=0;wea_L=0;enb_L=1;
ena_v=0;wea_v=0; enb_v=0;
n_state=wait_L;
end
wait_L: begin
if(counter==cmax) begin
counter=counter_reg-cmax;
// if(counter==cmax) begin
// counter=counter_reg-cmax;
n_state=state_L;
end
else
counter=counter_reg+1;
// end
// else
// counter=counter_reg+1;
end
state_L: begin
ena_L=1;wea_L=1;enb_L=0;
ena_L=1'b1;wea_L=1'b1;enb_L=0;
ena_v=0;wea_v=0; enb_v=0;
tmp_L=tmp_L_reg+1;
temp_index_f=((N/(2**(depth+1)))*((2*(node)+1)-((2**(depth+1))-1)));
tmp_L=tmp_L_reg+1'b1;
temp_index_f=((N/(2**(depth+1'b1)))*((2*(node)+1'b1)-((2**(depth+1'b1))-1'b1)));
jL1=(tmp_L_reg)+temp_index_f;
jL2=(tmp_L_reg)+temp_index_f+(N/(2**depth));
fminsum_calc(L_out[jL1],L_out[jL2],L_in[jL1]);
@@ -576,26 +557,26 @@ begin
end

wait_R_logic: begin
depth=depth_reg-1; node=node_reg+1; tmp_R=0;
depth=depth_reg-1'b1; node=node_reg+1'b1; tmp_R=0;
n_state=wait_R;
end
wait_R: begin
ena_L=0;wea_L=0;enb_L=1;
ena_v=0;wea_v=0; enb_v=1;
if(counter==cmax) begin
counter=counter_reg-cmax;
// if(counter==cmax) begin
// counter=counter_reg-cmax;
n_state=state_R;
end
else
counter=counter_reg+1;
// end
// else
// counter=counter_reg+1;
end
state_R: begin
ena_L=1;wea_L=1;enb_L=0;
ena_L=1'b1;wea_L=1'b1;enb_L=0;
ena_v=0;wea_v=0; enb_v=0;
tmp_R=tmp_R_reg+1;
temp_index_f=((N/(2**(depth+1)))*((2*(node)+1)-((2**(depth+1))-1)));
temp_index_g=((N/(2**(depth+1)))*((2*(node-1)+1)-((2**(depth+1))-1)));
temp_index_f=((N/(2**(depth+1'b1)))*((2*(node)+1'b1)-((2**(depth+1'b1))-1'b1)));
temp_index_g=((N/(2**(depth+1'b1)))*((2*(node-1'b1)+1'b1)-((2**(depth+1'b1))-1'b1)));
jR1=(tmp_R_reg)+temp_index_g;
jR2=(tmp_R_reg)+temp_index_g+(N/(2**depth));
jR3=(tmp_R_reg)+temp_index_f;
@@ -612,24 +593,24 @@ begin
end
wait_U_logic: begin
depth=depth_reg-1; node=(node_reg-2)/2; tmp_U=0;
depth=depth_reg-1'b1; node=(node_reg-2)/2; tmp_U=0;
n_state=wait_U;
end
wait_U: begin
ena_L=0;wea_L=0;enb_L=0;
ena_v=0;wea_v=0; enb_v=1;
if(counter==cmax) begin
counter=counter_reg-cmax;
// if(counter==cmax) begin
// counter=counter_reg-cmax;
n_state=state_U;
end
else
counter=counter_reg+1;
// end
// else
// counter=counter_reg+1;
end
state_U: begin
ena_L=0;wea_L=0;enb_L=0;
ena_v=1;wea_v=1; enb_v=0;
tmp_U=tmp_U_reg+1;
temp_index_f=((N/(2**(depth)))*((2*node+1)-((2**(depth))-1)));
ena_v=1'b1;wea_v=1'b1; enb_v=0;
tmp_U=tmp_U_reg+1'b1;
temp_index_f=((N/(2**(depth)))*((2*node+1'b1)-((2**(depth))-1'b1)));
jU1=(tmp_U_reg)+temp_index_f;
jU2=(tmp_U_reg)+temp_index_f+(N/(2**(depth)));
v_in[jU1] = v_out[jU1] ^ v_out[jU2];
@@ -637,7 +618,7 @@ begin
if(tmp_U<(N/(2**(depth))))
n_state=state_U;
else if(depth>0 && node%2==0)
else if(depth>0 && ~node[0])
n_state = wait_U_logic;
else if(depth>0 && node!=0)
n_state=wait_R_logic;
@@ -645,24 +626,24 @@ begin
n_state=wait_lstate_logic;
end
wait_LRU_logic: begin
depth=depth_reg; node=(node_reg-1)/2;
depth=depth_reg; node=(node_reg-1'b1)/2;
n_state=wait_LRU;
end
wait_LRU: begin
ena_L=0;wea_L=0;enb_L=1;
ena_L=0;wea_L=0;enb_L=1'b1;
ena_v=0;wea_v=0; enb_v=0;
if(counter==cmax) begin
counter=counter_reg-cmax;
// if(counter==cmax) begin
// counter=counter_reg-cmax;
n_state=state_LRU;
end
else
counter=counter_reg+1;
// end
// else
// counter=counter_reg+1;
end
state_LRU: begin
ena_L=0;wea_L=0;enb_L=0;
ena_v=1;wea_v=1; enb_v=0;
temp_index_f=((N/(2**(depth)))*((2*node+1)-((2**(depth))-1)));
ena_v=1'b1;wea_v=1'b1; enb_v=0;
temp_index_f=((N/(2**(depth)))*((2*node+1'b1)-((2**(depth))-1'b1)));
fminsum_calc(L_out[temp_index_f],L_out[temp_index_f+1],LRU[0]);
u[(2*node)+2-N]=(f[(2*node)+2-N]==1) ? 0 : ((LRU[0][BITS-1] == 1) ? 1 : 0);
g_calc(L_out[temp_index_f],L_out[temp_index_f+1],u[(2*node)+2-N],LRU[1]);
@@ -670,7 +651,7 @@ begin
v_in[temp_index_f]=u[(2*node)+2-N] ^ u[(2*node)+3-N];
v_in[temp_index_f+1]=u[(2*node)+3-N];
if(node%2==1)
if(node[0]==1)
n_state = wait_R_logic;
else
n_state=wait_U_logic;
@@ -682,12 +663,12 @@ begin
wait_lnode: begin
ena_L=0;wea_L=0;enb_L=1;
ena_v=0;wea_v=0; enb_v=0;
if(counter==cmax) begin
counter=counter_reg-cmax;
// if(counter==cmax) begin
// counter=counter_reg-cmax;
n_state=state_lnode;
end
else
counter=counter_reg+1;
// end
// else
// counter=counter_reg+1;
end
state_lnode: begin
ena_L=0;wea_L=0;enb_L=0;
@@ -708,12 +689,12 @@ begin
wait_lstate: begin
ena_L=0;wea_L=0;enb_L=1;
ena_v=0;wea_v=0; enb_v=0;
if(counter==cmax) begin
counter=counter_reg-cmax;
// if(counter==cmax) begin
// counter=counter_reg-cmax;
n_state=state_last;
end
else
counter=counter_reg+1;
// end
// else
// counter=counter_reg+1;
end
state_last: begin
ena_L=0;wea_L=0;enb_L=0;
@@ -725,4 +706,3 @@ begin
else n_state = idle;
end
endmodule
*/

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