shivakanta_project/axi_transaction.sv

`include "uvm_macros.svh"
import uvm_pkg::*;

class axi_seq_item extends uvm_seq_item;
//'uvm_object_utils(axi_seq_item);

function new(string name="axi_seq_item")
super.new(name);
endfunction
//write adress channel signals

rand bit wr_rd;

rand bit [3:0] awid;
rand logic[31:0] awaddr;
rand logic[2:0] awsize;
rand logic[3:0] awlen;
rand logic[1:0] awburst;
rand logic[1:0] awlock;

logic awvalid;
logic awready;


  //write data channel 

rand bit [3:0] wid;
rand logic[31:0] wdata[][];
logic[3:0] wstrb;
logic wlast;
logic wvalid;
logic wready;

// write response channel
rand bit []3:0]bid;
logic[1:0] bresp;

logic bvalid;
logic bready;
  
// read adress channel

rand bit [3:0] arid;

rand logic[31:0] araddr;
rand logic[2:0] arsize;
rand logic[3:0] arlen;
rand logic[1:0] arburst;
rand logic[1:0] arlock;
logic arvalid;
logic arready;
    
// read data channel


rand bit [3:0] rid;
 logic[31:0] rdata;
 logic[3:0]rresp;
logic rlast;
logic rvalid;
logic rready;


`uvm_object_utils_begin(axi_seq_item)

`uvm_field_int(awid,UVM_ALL_ON)
`uvm_field_int(awaddr,UVM_ALL_ON)
`uvm_field_int(awsize,UVM_ALL_ON)
`uvm_field_int(awlen,UVM_ALL_ON)
`uvm_field_int(awburst,UVM_ALL_ON)
`uvm_field_int(awlock,UVM_ALL_ON)
`uvm_field_int(awvalid,UVM_ALL_ON)
`uvm_field_int(awready,UVM_ALL_ON)

`uvm_field_int(wid,UVM_ALL_ON)
`uvm_field_int(wdata,UVM_ALL_ON)
`uvm_field_int(wlast,UVM_ALL_ON)
`uvm_field_int(wstrb,UVM_ALL_ON)
`uvm_field_int(wvalid,UVM_ALL_ON)
`uvm_field_int(wready,UVM_ALL_ON)

`uvm_field_int(bid,UVM_ALL_ON)
`uvm_field_int(bresp,UVM_ALL_ON)
`uvm_field_int(bvalid,UVM_ALL_ON)
`uvm_field_int(bready,UVM_ALL_ON)

`uvm_field_int(arid,UVM_ALL_ON)
`uvm_field_int(araddr,UVM_ALL_ON)
`uvm_field_int(arsize,UVM_ALL_ON)
`uvm_field_int(arlen,UVM_ALL_ON)
`uvm_field_int(arsize,UVM_ALL_ON)
`uvm_field_int(arburst,UVM_ALL_ON)
`uvm_field_int(arlock,UVM_ALL_ON)
`uvm_field_int(arvalid,UVM_ALL_ON)
`uvm_field_int(arready,UVM_ALL_ON)

`uvm_field_int(rid,UVM_ALL_ON)
`uvm_field_int(rdata,UVM_ALL_ON)
`uvm_field_int(rlast,UVM_ALL_ON)
`uvm_field_int(rresp,UVM_ALL_ON)
`uvm_field_int(rvalid,UVM_ALL_ON)
`uvm_field_int(rready,UVM_ALL_ON)

`uvm_object_utils_end

//constraints for axi

constraint aligned_addr{awadd%2**awsize==0;}

constraint wrap_addr{solve awburst before awlen
                     if(awburst==2'b 10)
                     awlen inside{1,3,7,15};}

constraint wid_sig{awid==wid;}

constraint rid_sig{arid==rid;}

constraint axi_4kb{awaddr%4096+(2**awsize*(awlen+1))<=4096;}



//:constrain
endclass:axi_seq_item