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@@ -0,0 +1,63 @@ |
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class axi_drv extends uvm_driver#(seq_item); |
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`uvm_component_utils(axi_drv) |
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virtual intf vif; |
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seq_item txn; |
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bit[7:0] temp [][]; |
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function new(string name="axi_drv",uvm_component parent); |
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super.new(name,parent); |
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endfunction |
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function void build_phase(uvm_phase phase); |
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super.build_phase(phase); |
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txn=seq_item::type_id::create("txn",this); |
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if(!uvm_config_db#(virtual intf)::get(this,"","vif",vif) |
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`uvm_error("build_phase",$sformatf("failed to get confg_db")) |
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endfunction |
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task run_phase(); |
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forever begin |
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seq_item_port.get(txn); |
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drive(txn); |
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seq_item_port.item_done(); |
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end |
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endtask |
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task drive(seq_item txn); |
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@(posedge vif.clk) |
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vif.rst<=1; |
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repeat(2)@(posedge vif.clk) |
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vif.rst<=0; |
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@(posedge vif.clk) |
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if(txn.write) |
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begin |
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vif.awddr<=txn.awaddr; |
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vif.awlen <= txn.awlen; |
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vif.awsize<=txn.awsize; |
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vif.awburst<=txn.awburst; |
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vif.awlock<=txn.awlock; |
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vif.awid<=txn.awid; |
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vif.awvalid<=1; |
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wait(vif.awready) |
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@(posedge vif.clk) |
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vif.awvalid<=0; |
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@(posedge vif.clk) |
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for(int i=0;i<trans.awlength+1;i++) |
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begin |
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for(int j=0;j<2**trans.awsize;j++) |
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begin |
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temp[i][j*8+:8]<= trans.wdata[i][j]; |
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if(i=trans.awlength-1) |
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trans.wlast<=1; |
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else |
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trans.wlast<=0; |
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end |
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end |
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vif.wdata<=temp; |
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endtask |
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endclass |
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