1 gewijzigde bestanden met toevoegingen van 423 en 72 verwijderingen
+ 423
- 72
sources_1/imports/Downloads/sc_decoder_fsm.sv
Bestand weergeven
| @@ -1,3 +1,4 @@ | |||
| `timescale 1ns/1ps | |||
| `define BITS 8 | |||
| @@ -144,12 +145,12 @@ always_comb | |||
| wea_L = 0; | |||
| node = node_reg; | |||
| depth = depth_reg; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| if(in_valid) | |||
| case(c_state) | |||
| idle: | |||
| begin | |||
| L_in = 0; | |||
| // L_in = 0; | |||
| depth = 0; node = 0; | |||
| tmp_L = 0; tmp_R = 0; tmp_U = 0; | |||
| ena_L = 0; wea_L = 0; enb_L = 0; | |||
| @@ -168,9 +169,9 @@ always_comb | |||
| ena_L = 1'b1; wea_L = 1'b1; | |||
| enb_L = 0; ena_v = 0; | |||
| wea_v = 0; enb_v = 0; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| u = u; | |||
| v = v; | |||
| @@ -183,14 +184,14 @@ always_comb | |||
| wait_L_logic: | |||
| begin | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| depth = depth_reg + 1'b1; node = ((2*node_reg) + 1'b1); | |||
| ena_L = 0; wea_L = 0; | |||
| tmp_L = 0; enb_L = 1'b1; | |||
| ena_v = 0; wea_v = 0; | |||
| enb_v = 0; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| u = u; | |||
| v = v; | |||
| @@ -204,10 +205,10 @@ always_comb | |||
| begin | |||
| u = u; | |||
| v = v; | |||
| L_in = L_in; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| // L_in = L_in; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| ena_L = ena_L; enb_L = enb_L; | |||
| wea_L = wea_L; | |||
| // depth = depth_reg; | |||
| @@ -223,8 +224,8 @@ always_comb | |||
| ena_v = 0; wea_v = 0; enb_v = 0; | |||
| tmp_L = tmp_L_reg + 1'b1; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| temp_index_f = ((N/(2**(depth+1'b1))) * ((2*(node) + 1'b1) - ((2**(depth + 1'b1)) - 1'b1))); | |||
| @@ -245,13 +246,13 @@ always_comb | |||
| begin | |||
| u = u; | |||
| v = v; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| ena_L = ena_L; enb_L = enb_L; | |||
| wea_L = wea_L; | |||
| depth = depth_reg - 1'b1; | |||
| node = node_reg + 1'b1; | |||
| tmp_L = tmp_L; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_U = tmp_U_reg; | |||
| tmp_R = 0; | |||
| n_state = wait_R; | |||
| end | |||
| @@ -259,15 +260,15 @@ always_comb | |||
| wait_R: | |||
| begin | |||
| // depth = depth_reg; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| ena_L = 0;wea_L = 0; enb_L = 1'b1; | |||
| ena_v = 0;wea_v = 0; enb_v = 1'b1; | |||
| wea_L = wea_L; | |||
| u = u; | |||
| v = v; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| n_state = state_R; | |||
| end | |||
| @@ -279,8 +280,8 @@ always_comb | |||
| ena_L = 1'b1; wea_L = 1'b1; enb_L = 0; | |||
| ena_v = 0; wea_v = 0; enb_v = 0; | |||
| tmp_L = tmp_L; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_U = tmp_U_reg; | |||
| tmp_R = tmp_R_reg + 1'b1; | |||
| temp_index_f = ((N/(2**(depth + 1'b1))) * ((2*(node) + 1'b1) -((2**(depth + 1'b1)) - 1'b1))); | |||
| temp_index_g = ((N/(2**(depth + 1'b1))) * ((2*(node - 1'b1) + 1'b1)-((2**(depth + 1'b1)) - 1'b1))); | |||
| @@ -305,27 +306,26 @@ always_comb | |||
| begin | |||
| depth = depth_reg - 1'b1; | |||
| node = (node_reg - 2) >> 1; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| tmp_U = 0; | |||
| wea_L = wea_L; | |||
| u = u; | |||
| v = v; | |||
| ena_L = ena_L; enb_L = enb_L; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| n_state = wait_U; | |||
| end | |||
| wait_U: | |||
| begin | |||
| // depth = depth_reg; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| ena_L = 0; wea_L = 0; enb_L = 0; | |||
| ena_v = 0; wea_v = 0; enb_v = 1'b1; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| n_state = state_U; | |||
| end | |||
| @@ -333,13 +333,13 @@ always_comb | |||
| state_U: | |||
| begin | |||
| // depth = depth_reg; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| ena_L = 0; ena_v =1'b1; enb_L = 0; | |||
| wea_L = 0; wea_v =1'b1; enb_v = 0; | |||
| u = u; | |||
| v = v; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg+1'b1; | |||
| temp_index_f = ((N/(2**(depth))) * ((2*node + 1'b1) - ((2**(depth)) - 1'b1))); | |||
| @@ -363,13 +363,13 @@ always_comb | |||
| begin | |||
| u = u; | |||
| v = v; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| wea_L = wea_L; | |||
| // depth = depth_reg; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| ena_L = ena_L; enb_L = enb_L; | |||
| node = (node_reg - 1'b1) >> 1; | |||
| @@ -379,14 +379,14 @@ always_comb | |||
| wait_LRU: | |||
| begin | |||
| // depth = depth_reg; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| u = u; | |||
| v = v; | |||
| ena_L = 0; wea_L = 0; enb_L = 1'b1; | |||
| ena_v = 0; wea_v = 0; enb_v = 0; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| n_state = state_LRU; | |||
| end | |||
| @@ -397,11 +397,11 @@ always_comb | |||
| ena_L = 0; ena_v = 1'b1; | |||
| enb_v = 0; wea_v = 1'b1; | |||
| wea_L = 0; enb_L = 0; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| v = v; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| temp_index_f = ((N/(2**(depth))) * ((2*node + 1'b1) - ((2**(depth)) - 1'b1))); | |||
| fminsum_calc(L_out[temp_index_f],L_out[temp_index_f + 1],LRU[0]); | |||
| @@ -425,10 +425,10 @@ always_comb | |||
| begin | |||
| u = u; | |||
| v = v; | |||
| L_in = L_in; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| // L_in = L_in; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| depth = depth_reg + 1'b1; node = node_reg; | |||
| ena_L = ena_L; enb_L = enb_L; | |||
| wea_L = wea_L; | |||
| @@ -441,10 +441,10 @@ always_comb | |||
| // depth = depth_reg; | |||
| u = u; | |||
| v = v; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| L_in = L_in; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| // L_in = L_in; | |||
| ena_L = 0; wea_L = 0; enb_L = 1'b1; | |||
| ena_v = 0; wea_v = 0; enb_v = 0; | |||
| @@ -456,12 +456,12 @@ always_comb | |||
| // depth = depth_reg; | |||
| u = u; | |||
| v = v; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| ena_L = 0; wea_L = 0; enb_L = 0; | |||
| ena_v = 1'b1; wea_v = 1'b1; enb_v = 0; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| temp_index_f = ((N/(2**(depth))) * ((2*node + 1'b1) - ((2**(depth)) - 1'b1))); | |||
| @@ -483,12 +483,12 @@ always_comb | |||
| begin | |||
| u = u; | |||
| v = v; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| // depth = depth_reg; | |||
| node = node_reg; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| ena_L = ena_L; enb_L = enb_L; | |||
| wea_L = wea_L; | |||
| @@ -500,12 +500,12 @@ always_comb | |||
| // depth = depth_reg; | |||
| u = u; | |||
| v = v; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| ena_L = 0; wea_L = 0; enb_L = 1'b1; | |||
| ena_v = 0; wea_v = 0; enb_v = 0; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| n_state = state_last; | |||
| end | |||
| @@ -513,13 +513,13 @@ always_comb | |||
| state_last: | |||
| begin | |||
| // depth = depth_reg; | |||
| L_in = L_in; | |||
| // L_in = L_in; | |||
| u = u; | |||
| ena_L = 0; wea_L = 0; enb_L = 0; | |||
| ena_v = 1'b1; wea_v = 1'b1; enb_v = 0; | |||
| tmp_L = tmp_L; | |||
| tmp_R = tmp_R; | |||
| tmp_U = tmp_U; | |||
| tmp_L = tmp_L_reg; | |||
| tmp_R = tmp_R_reg; | |||
| tmp_U = tmp_U_reg; | |||
| v = v_out; | |||
| @@ -529,7 +529,7 @@ always_comb | |||
| begin | |||
| u = 0; | |||
| v = 0; | |||
| L_in = 0; | |||
| // L_in = 0; | |||
| depth = 0; node = 0; | |||
| tmp_L = 0; tmp_R = 0; tmp_U = 0; | |||
| ena_L = 0; enb_L = 0; wea_L = 0; | |||
| @@ -542,7 +542,7 @@ always_comb | |||
| begin | |||
| u = 0; | |||
| v = 0; | |||
| L_in = 0; | |||
| // L_in = 0; | |||
| depth = 0; node = 0; | |||
| tmp_L = 0; tmp_R = 0; tmp_U = 0; | |||
| ena_L = 0; wea_L = 0; enb_L = 0; | |||
| @@ -551,3 +551,354 @@ always_comb | |||
| end | |||
| end | |||
| endmodule | |||
| /* | |||
| `timescale 1ns / 1ns | |||
| ////////////////////////////////////////////////////////////////////////////////// | |||
| // Company: | |||
| // Engineer: | |||
| // | |||
| // Create Date: 02/24/2021 08:03:07 PM | |||
| // Design Name: | |||
| // Module Name: sc_decoder_fsm | |||
| // Project Name: | |||
| // Target Devices: | |||
| // Tool Versions: | |||
| // Description: | |||
| // | |||
| // Dependencies: | |||
| // | |||
| // Revision: | |||
| // Revision 0.01 - File Created | |||
| // Additional Comments: | |||
| // | |||
| ////////////////////////////////////////////////////////////////////////////////// | |||
| `define BITS 8 | |||
| module sc_decoder_fsm #(parameter BITS=8, N=11'd16)( | |||
| input clk, rst, | |||
| input in_valid, | |||
| input signed [BITS-1:0] y[N], | |||
| input f[N], | |||
| output wire u_cap[N], | |||
| output wire [N-1:0]v_final, | |||
| output wire out_valid | |||
| ); | |||
| //function for fminsum calculation | |||
| function void fminsum_calc; | |||
| input signed [`BITS-1:0] a; | |||
| input signed [`BITS-1:0] b; | |||
| output signed [`BITS-1:0] c; | |||
| logic [`BITS-2:0] abs_a; | |||
| logic [`BITS-2:0] abs_b; | |||
| logic [`BITS-2:0] abs_c; | |||
| abs_a = (a[`BITS-1] == 1) ? ~a[`BITS-2:0] + 1 : a[`BITS-2:0]; | |||
| abs_b = (b[`BITS-1] == 1) ? ~b[`BITS-2:0] + 1 : b[`BITS-2:0]; | |||
| c[`BITS-1] = a[`BITS-1] ^ b[`BITS-1]; | |||
| abs_c = (abs_b < abs_a) ? abs_b : abs_a; | |||
| c[`BITS-2:0] = (c[`BITS-1] == 1) ? ~abs_c + 1 : abs_c; | |||
| endfunction | |||
| //function for g-value calculation | |||
| function void g_calc; | |||
| input signed [`BITS-1:0] a; | |||
| input signed [`BITS-1:0] b; | |||
| input u; | |||
| output signed [`BITS:0] c; | |||
| c = (u == 0) ? (b + a) : (b + (~a+1)); | |||
| endfunction | |||
| //parameters and signals declarations | |||
| localparam d=$clog2(N); //N=4, d=2(0 & 1) | |||
| localparam n=2*N-1; //(2**d)-1; | |||
| localparam cmax=0; | |||
| logic u[N]; | |||
| logic [d:0]temp_index_f,temp_index_g; | |||
| reg signed [BITS-1:0] LRU[2]; | |||
| reg [N-1:0]v; | |||
| logic [N-1:0][BITS-1:0]L_in, L_out; | |||
| logic [N-1:0]v_in, v_out; | |||
| logic ena_v,enb_v,wea_v; | |||
| logic ena_L,enb_L,wea_L; | |||
| logic [1:0]counter,counter_reg; | |||
| logic [11:0]jL1,jL2,jR1,jR2,jR3,jU1,jU2; | |||
| logic [4:0] c_state, n_state; | |||
| //Auxiliary registers declarations | |||
| logic [d:0] depth,depth_reg; | |||
| logic [d:0] node,node_reg; | |||
| logic [11:0]tmp_L,tmp_L_reg, tmp_R,tmp_R_reg,tmp_U, tmp_U_reg; | |||
| //FSM States | |||
| localparam idle=5'd0, root=5'd1, wait_L_logic=5'd2, wait_L=5'd3, state_L=5'd4, wait_R_logic=5'd5, wait_R=5'd6, state_R=5'd7; | |||
| localparam wait_U_logic=5'd8, wait_U=5'd9, state_U=5'd10,wait_LRU_logic=5'd11, wait_LRU=5'd12, state_LRU=5'd13; | |||
| localparam wait_lnode_logic=5'd14, wait_lnode=5'd15, state_lnode=5'd16,wait_lstate_logic=5'd17, wait_lstate=5'd18, state_last=5'd19; | |||
| //BlockRAM Instantiations | |||
| bram_v #(.ADDR_WIDTH(d-1),.DATA_WIDTH(N),.DEPTH(2**(d-1))) bram_v_i ( | |||
| .clk(clk),.ena(ena_v),.enb(enb_v), | |||
| .addra(depth_reg-1), | |||
| .addrb(depth_reg), | |||
| .wea(wea_v), | |||
| .dia(v_in), | |||
| .dob(v_out) | |||
| ); | |||
| bram_L #(.ADDR_WIDTH(d-1),.DATA_WIDTH(N*BITS),.DEPTH(2**(d-1)),.N(N)) bram_L_i ( | |||
| .clk(clk),.ena(ena_L),.enb(enb_L), | |||
| .addra(depth_reg), | |||
| .addrb(depth_reg-1), | |||
| .wea(wea_L), | |||
| .dia(L_in), | |||
| .dob(L_out) | |||
| ); | |||
| //output assignment | |||
| for(genvar i=0; i<N; i++) | |||
| begin | |||
| assign u_cap[i] = u[i]; | |||
| end | |||
| assign v_final=v; | |||
| assign out_valid=(n_state==state_last)?1'b1:1'b0; | |||
| // Sequential Logic - FSM State and Data Registers | |||
| always_ff@(posedge clk) | |||
| begin | |||
| if(rst==1) | |||
| begin | |||
| c_state <= idle; | |||
| depth_reg<=0; | |||
| node_reg<=0; | |||
| counter_reg<=0; | |||
| tmp_L_reg<=0; | |||
| tmp_R_reg<=0; | |||
| tmp_U_reg<=0; | |||
| end | |||
| else | |||
| begin | |||
| c_state <= n_state; | |||
| depth_reg<=depth; | |||
| node_reg<=node; | |||
| counter_reg<=counter; | |||
| tmp_L_reg<=tmp_L; | |||
| tmp_R_reg<=tmp_R; | |||
| tmp_U_reg<=tmp_U; | |||
| end | |||
| end | |||
| //Combinational Logic - FSM Next State Logic | |||
| always_comb | |||
| //always@(y or c_state or f, L_out) | |||
| begin | |||
| if(in_valid==1) | |||
| case(c_state) | |||
| idle: begin | |||
| depth=0; node=0; counter=0; tmp_L=0; tmp_R=0; tmp_U=0; | |||
| ena_L=0;wea_L=0;enb_L=0; | |||
| ena_v=0;wea_v=0; enb_v=0; | |||
| if(out_valid==1) | |||
| n_state=idle; | |||
| else | |||
| n_state=root; | |||
| end | |||
| root: begin | |||
| depth=depth_reg;node=node_reg; | |||
| ena_L=1;wea_L=1;enb_L=0; | |||
| ena_v=0;wea_v=0; enb_v=0; | |||
| for(int k=0; k<N; k++) | |||
| L_in[k]=y[k]; | |||
| n_state=wait_L_logic; | |||
| end | |||
| wait_L_logic: | |||
| begin | |||
| depth=depth_reg+1; node=((2*node_reg)+1); tmp_L=0; | |||
| ena_L=0;wea_L=0;enb_L=1; | |||
| ena_v=0;wea_v=0; enb_v=0; | |||
| if(depth < d) | |||
| n_state = wait_L; | |||
| else | |||
| n_state = wait_LRU_logic; | |||
| end | |||
| wait_L: begin | |||
| if(counter==cmax) begin | |||
| counter=counter_reg-cmax; | |||
| n_state=state_L; | |||
| end | |||
| else | |||
| counter=counter_reg+1; | |||
| end | |||
| state_L: begin | |||
| ena_L=1;wea_L=1;enb_L=0; | |||
| ena_v=0;wea_v=0; enb_v=0; | |||
| tmp_L=tmp_L_reg+1; | |||
| temp_index_f=((N/(2**(depth+1)))*((2*(node)+1)-((2**(depth+1))-1))); | |||
| jL1=(tmp_L_reg)+temp_index_f; | |||
| jL2=(tmp_L_reg)+temp_index_f+(N/(2**depth)); | |||
| fminsum_calc(L_out[jL1],L_out[jL2],L_in[jL1]); | |||
| if(tmp_L< (N/(2**depth))) | |||
| n_state=state_L; | |||
| else if(depth<d) | |||
| n_state=wait_L_logic; | |||
| else | |||
| n_state=wait_LRU_logic; | |||
| end | |||
| wait_R_logic: begin | |||
| depth=depth_reg-1; node=node_reg+1; tmp_R=0; | |||
| n_state=wait_R; | |||
| end | |||
| wait_R: begin | |||
| ena_L=0;wea_L=0;enb_L=1; | |||
| ena_v=0;wea_v=0; enb_v=1; | |||
| if(counter==cmax) begin | |||
| counter=counter_reg-cmax; | |||
| n_state=state_R; | |||
| end | |||
| else | |||
| counter=counter_reg+1; | |||
| end | |||
| state_R: begin | |||
| ena_L=1;wea_L=1;enb_L=0; | |||
| ena_v=0;wea_v=0; enb_v=0; | |||
| tmp_R=tmp_R_reg+1; | |||
| temp_index_f=((N/(2**(depth+1)))*((2*(node)+1)-((2**(depth+1))-1))); | |||
| temp_index_g=((N/(2**(depth+1)))*((2*(node-1)+1)-((2**(depth+1))-1))); | |||
| jR1=(tmp_R_reg)+temp_index_g; | |||
| jR2=(tmp_R_reg)+temp_index_g+(N/(2**depth)); | |||
| jR3=(tmp_R_reg)+temp_index_f; | |||
| g_calc(L_out[jR1],L_out[jR2],v_out[jR1],L_in[jR3]); | |||
| if(tmp_R< (N/(2**depth))) | |||
| n_state=state_R; | |||
| else if(node==((2**d)-2)) | |||
| n_state=wait_lnode_logic; | |||
| else if(depth==d) | |||
| n_state=wait_LRU_logic; | |||
| else | |||
| n_state = wait_L_logic; | |||
| end | |||
| wait_U_logic: begin | |||
| depth=depth_reg-1; node=(node_reg-2)/2; tmp_U=0; | |||
| n_state=wait_U; | |||
| end | |||
| wait_U: begin | |||
| ena_L=0;wea_L=0;enb_L=0; | |||
| ena_v=0;wea_v=0; enb_v=1; | |||
| if(counter==cmax) begin | |||
| counter=counter_reg-cmax; | |||
| n_state=state_U; | |||
| end | |||
| else | |||
| counter=counter_reg+1; | |||
| end | |||
| state_U: begin | |||
| ena_L=0;wea_L=0;enb_L=0; | |||
| ena_v=1;wea_v=1; enb_v=0; | |||
| tmp_U=tmp_U_reg+1; | |||
| temp_index_f=((N/(2**(depth)))*((2*node+1)-((2**(depth))-1))); | |||
| jU1=(tmp_U_reg)+temp_index_f; | |||
| jU2=(tmp_U_reg)+temp_index_f+(N/(2**(depth))); | |||
| v_in[jU1] = v_out[jU1] ^ v_out[jU2]; | |||
| v_in[jU2] = v_out[jU2]; | |||
| if(tmp_U<(N/(2**(depth)))) | |||
| n_state=state_U; | |||
| else if(depth>0 && node%2==0) | |||
| n_state = wait_U_logic; | |||
| else if(depth>0 && node!=0) | |||
| n_state=wait_R_logic; | |||
| else | |||
| n_state=wait_lstate_logic; | |||
| end | |||
| wait_LRU_logic: begin | |||
| depth=depth_reg; node=(node_reg-1)/2; | |||
| n_state=wait_LRU; | |||
| end | |||
| wait_LRU: begin | |||
| ena_L=0;wea_L=0;enb_L=1; | |||
| ena_v=0;wea_v=0; enb_v=0; | |||
| if(counter==cmax) begin | |||
| counter=counter_reg-cmax; | |||
| n_state=state_LRU; | |||
| end | |||
| else | |||
| counter=counter_reg+1; | |||
| end | |||
| state_LRU: begin | |||
| ena_L=0;wea_L=0;enb_L=0; | |||
| ena_v=1;wea_v=1; enb_v=0; | |||
| temp_index_f=((N/(2**(depth)))*((2*node+1)-((2**(depth))-1))); | |||
| fminsum_calc(L_out[temp_index_f],L_out[temp_index_f+1],LRU[0]); | |||
| u[(2*node)+2-N]=(f[(2*node)+2-N]==1) ? 0 : ((LRU[0][BITS-1] == 1) ? 1 : 0); | |||
| g_calc(L_out[temp_index_f],L_out[temp_index_f+1],u[(2*node)+2-N],LRU[1]); | |||
| u[(2*node)+3-N]=(f[(2*node)+3-N]==1) ? 0 : ((LRU[1][BITS-1] == 1) ? 1 : 0); | |||
| v_in[temp_index_f]=u[(2*node)+2-N] ^ u[(2*node)+3-N]; | |||
| v_in[temp_index_f+1]=u[(2*node)+3-N]; | |||
| if(node%2==1) | |||
| n_state = wait_R_logic; | |||
| else | |||
| n_state=wait_U_logic; | |||
| end | |||
| wait_lnode_logic: begin | |||
| depth=depth_reg+1; node=node_reg; | |||
| n_state=wait_lnode; | |||
| end | |||
| wait_lnode: begin | |||
| ena_L=0;wea_L=0;enb_L=1; | |||
| ena_v=0;wea_v=0; enb_v=0; | |||
| if(counter==cmax) begin | |||
| counter=counter_reg-cmax; | |||
| n_state=state_lnode; | |||
| end | |||
| else | |||
| counter=counter_reg+1; | |||
| end | |||
| state_lnode: begin | |||
| ena_L=0;wea_L=0;enb_L=0; | |||
| ena_v=1;wea_v=1; enb_v=0; | |||
| temp_index_f=((N/(2**(depth)))*((2*node+1)-((2**(depth))-1))); | |||
| fminsum_calc(L_out[temp_index_f],L_out[temp_index_f+1],LRU[0]); | |||
| u[(2*node)+2-N]=(f[(2*node)+2-N]==1) ? 0 : ((LRU[0][BITS-1] == 1) ? 1 : 0); | |||
| g_calc(L_out[temp_index_f],L_out[temp_index_f+1],u[(2*node)+2-N],LRU[1]); | |||
| u[(2*node)+3-N]=(f[(2*node)+3-N]==1) ? 0 : ((LRU[1][BITS-1] == 1) ? 1 : 0); | |||
| v_in[temp_index_f]=u[(2*node)+2-N] ^ u[(2*node)+3-N]; | |||
| v_in[temp_index_f+1]=u[(2*node)+3-N]; | |||
| n_state = wait_U_logic; | |||
| end | |||
| wait_lstate_logic: begin | |||
| depth=depth_reg; node=node_reg; | |||
| n_state=wait_lstate; | |||
| end | |||
| wait_lstate: begin | |||
| ena_L=0;wea_L=0;enb_L=1; | |||
| ena_v=0;wea_v=0; enb_v=0; | |||
| if(counter==cmax) begin | |||
| counter=counter_reg-cmax; | |||
| n_state=state_last; | |||
| end | |||
| else | |||
| counter=counter_reg+1; | |||
| end | |||
| state_last: begin | |||
| ena_L=0;wea_L=0;enb_L=0; | |||
| ena_v=1;wea_v=1; enb_v=0; | |||
| v=v_out; | |||
| n_state=idle; | |||
| end | |||
| endcase | |||
| else n_state = idle; | |||
| end | |||
| endmodule | |||
| */ | |||