| @@ -107,29 +107,29 @@ task driver::write_address_channel(); | |||
| write_address = write_address_queue.pop_front(); | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| req.control = 1; | |||
| `uvm_info("MASTER_DRIVER",$sformatf("PRINTING FROM DRIVER \n %s",write_address.sprint()),UVM_HIGH) | |||
| vif.mas_dr.awid <= write_address.awid; | |||
| vif.mas_dr.awaddr <= write_address.awaddr; | |||
| vif.mas_dr.awlen <= write_address.awlen; | |||
| vif.mas_dr.awsize <= write_address.awsize; | |||
| vif.mas_dr.awburst <= write_address.awburst; | |||
| vif.mas_dr.awvalid <= 1; | |||
| vif.driver.awid <= write_address.awid; | |||
| vif.driver.awaddr <= write_address.awaddr; | |||
| vif.driver.awlen <= write_address.awlen; | |||
| vif.driver.awsize <= write_address.awsize; | |||
| vif.driver.awburst <= write_address.awburst; | |||
| vif.driver.awvalid <= 1; | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| wait (vif.mas_dr.awready); | |||
| wait (vif.driver.awready); | |||
| vif.mas_dr.awvalid <= 0; | |||
| vif.driver.awvalid <= 0; | |||
| write_data_sema.put(1); | |||
| write_address_sema.put(1); | |||
| repeat(2) | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| endtask | |||
| //////////////////////////////////////// WRITE DATA CHANNEL | |||
| @@ -141,7 +141,7 @@ task driver::write_data_channel(); | |||
| write_data = write_data_queue.pop_front(); | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| write_data.control = 2; | |||
| `uvm_info("MASTER_DRIVER",$sformatf("PRINTING FROM DRIVER \n %s",write_data.sprint()),UVM_HIGH) | |||
| @@ -170,35 +170,35 @@ task driver::incr_burst(); | |||
| case (write_data.wstrobe[i]) | |||
| 4'b0001 : vif.mas_dr.wdata [7:0] <= write_data.wdata[i]; | |||
| 4'b0010 : vif.mas_dr.wdata [15:8] <= write_data.wdata[i]; | |||
| 4'b0100 : vif.mas_dr.wdata [23:16] <= write_data.wdata[i]; | |||
| 4'b1000 : vif.mas_dr.wdata [31:24] <= write_data.wdata[i]; | |||
| 4'b0011 : vif.mas_dr.wdata [15:0] <= write_data.wdata[i]; | |||
| 4'b1100 : vif.mas_dr.wdata [31:16] <= write_data.wdata[i]; | |||
| 4'b1110 : vif.mas_dr.wdata [31:8] <= write_data.wdata[i]; | |||
| 4'b1111 : vif.mas_dr.wdata <= write_data.wdata[i]; | |||
| 4'b0001 : vif.driver.wdata [7:0] <= write_data.wdata[i]; | |||
| 4'b0010 : vif.driver.wdata [15:8] <= write_data.wdata[i]; | |||
| 4'b0100 : vif.driver.wdata [23:16] <= write_data.wdata[i]; | |||
| 4'b1000 : vif.driver.wdata [31:24] <= write_data.wdata[i]; | |||
| 4'b0011 : vif.driver.wdata [15:0] <= write_data.wdata[i]; | |||
| 4'b1100 : vif.driver.wdata [31:16] <= write_data.wdata[i]; | |||
| 4'b1110 : vif.driver.wdata [31:8] <= write_data.wdata[i]; | |||
| 4'b1111 : vif.driver.wdata <= write_data.wdata[i]; | |||
| endcase | |||
| vif.mas_dr.wstrobe <= write_data.wstrobe[i]; | |||
| vif.mas_dr.wid <= write_data.wid; | |||
| vif.driver.wstrobe <= write_data.wstrobe[i]; | |||
| vif.driver.wid <= write_data.wid; | |||
| if (i == write_data.burst_len - 1) | |||
| vif.mas_dr.wlast <= 1; | |||
| vif.driver.wlast <= 1; | |||
| else | |||
| vif.mas_dr.wlast <= 0; | |||
| vif.driver.wlast <= 0; | |||
| vif.mas_dr.wvalid <= 1; | |||
| vif.driver.wvalid <= 1; | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| wait (vif.mas_dr.wready); | |||
| wait (vif.driver.wready); | |||
| vif.mas_dr.wlast <= 0; | |||
| vif.mas_dr.wvalid <= 0; | |||
| vif.driver.wlast <= 0; | |||
| vif.driver.wvalid <= 0; | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| end | |||
| endtask | |||
| @@ -212,29 +212,29 @@ task driver::fixed_burst (); | |||
| case (write_data.awsize) | |||
| 2'b00 : vif.mas_dr.wdata[7:0] <= write_data.wdata[i]; | |||
| 2'b01 : vif.mas_dr.wdata[15:0] <= write_data.wdata[i]; | |||
| 2'b10 : vif.mas_dr.wdata[31:0] <= write_data.wdata[i]; | |||
| 2'b00 : vif.driver.wdata[7:0] <= write_data.wdata[i]; | |||
| 2'b01 : vif.driver.wdata[15:0] <= write_data.wdata[i]; | |||
| 2'b10 : vif.driver.wdata[31:0] <= write_data.wdata[i]; | |||
| endcase | |||
| vif.mas_dr.wid <= write_data.wid; | |||
| vif.driver.wid <= write_data.wid; | |||
| if (i == write_data.burst_len - 1) | |||
| vif.mas_dr.wlast <= 1; | |||
| vif.driver.wlast <= 1; | |||
| else | |||
| vif.mas_dr.wlast <= 0; | |||
| vif.driver.wlast <= 0; | |||
| vif.mas_dr.wvalid <= 1; | |||
| vif.driver.wvalid <= 1; | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| wait (vif.mas_dr.wready); | |||
| wait (vif.driver.wready); | |||
| vif.mas_dr.wlast <= 0; | |||
| vif.mas_dr.wvalid <= 0; | |||
| vif.driver.wlast <= 0; | |||
| vif.driver.wvalid <= 0; | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| end | |||
| endtask | |||
| @@ -251,15 +251,15 @@ task driver::write_response_channel (); | |||
| write_response_sema_1.get(1); | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| wait(vif.mas_dr.bvalid) | |||
| wait(vif.driver.bvalid) | |||
| write_response.bid = vif.mas_dr.bid; | |||
| write_response.bresp = vif.mas_dr.bresp; | |||
| write_response.bid = vif.driver.bid; | |||
| write_response.bresp = vif.driver.bresp; | |||
| vif.mas_dr.bready <= 1; | |||
| @(vif.mas_dr); | |||
| vif.driver.bready <= 1; | |||
| @(vif.driver); | |||
| foreach (write_response_queue[i]) | |||
| begin | |||
| @@ -286,8 +286,8 @@ task driver::write_response_channel (); | |||
| end | |||
| end | |||
| vif.mas_dr.bready <= 0; | |||
| @(vif.mas_dr); | |||
| vif.driver.bready <= 0; | |||
| @(vif.driver); | |||
| write_response_sema.put(1); | |||
| write_response_sema_1.put(1); | |||
| @@ -302,29 +302,29 @@ task driver::read_address_channel(); | |||
| read_address = read_address_queue.pop_front(); | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| read_address.control = 4; | |||
| `uvm_info("MASTER_DRIVER",$sformatf("PRINTING FROM DRIVER \n %s",read_address.sprint()),UVM_HIGH) | |||
| vif.mas_dr.arid <= read_address.arid; | |||
| vif.mas_dr.araddr <= read_address.araddr; | |||
| vif.mas_dr.arlen <= read_address.arlen; | |||
| vif.mas_dr.arsize <= read_address.arsize; | |||
| vif.mas_dr.arburst <= read_address.arburst; | |||
| vif.mas_dr.arvalid <= 1; | |||
| vif.driver.arid <= read_address.arid; | |||
| vif.driver.araddr <= read_address.araddr; | |||
| vif.driver.arlen <= read_address.arlen; | |||
| vif.driver.arsize <= read_address.arsize; | |||
| vif.driver.arburst <= read_address.arburst; | |||
| vif.driver.arvalid <= 1; | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| wait (vif.mas_dr.arready); | |||
| wait (vif.driver.arready); | |||
| vif.mas_dr.arvalid <= 0; | |||
| vif.driver.arvalid <= 0; | |||
| read_data_response_sema.put(1); | |||
| read_address_sema.put(1); | |||
| repeat(2) | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| endtask | |||
| ////////////////////////////////////////// READ DATA AND RESPONSE CHANNEL | |||
| @@ -356,17 +356,17 @@ task driver::rd_incr_burst(); | |||
| for (int i = 0;i < read_data.arlen+1; i++) | |||
| begin | |||
| wait(vif.mas_dr.rvalid); | |||
| wait(vif.driver.rvalid); | |||
| case (read_data.arsize) | |||
| 2'b00 : read_data.rdata.push_back(vif.mas_dr.rdata[7:0]); | |||
| 2'b01 : read_data.rdata.push_back(vif.mas_dr.rdata[15:0]); | |||
| 2'b10 : read_data.rdata.push_back(vif.mas_dr.rdata[31:0]); | |||
| 2'b00 : read_data.rdata.push_back(vif.driver.rdata[7:0]); | |||
| 2'b01 : read_data.rdata.push_back(vif.driver.rdata[15:0]); | |||
| 2'b10 : read_data.rdata.push_back(vif.driver.rdata[31:0]); | |||
| endcase | |||
| case(vif.mas_dr.rresp) | |||
| case(vif.driver.rresp) | |||
| 2'b00 : read_data.rresp[i] = "TRANSACTION OKAY \n"; | |||
| 2'b01 : read_data.rresp[i] = "TRANSACTION FAILED \n"; | |||
| @@ -376,15 +376,15 @@ task driver::rd_incr_burst(); | |||
| endcase | |||
| repeat(read_data.rready_d) | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| vif.mas_dr.rready <= 1; | |||
| vif.driver.rready <= 1; | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| vif.mas_dr.rready <= 0; | |||
| vif.driver.rready <= 0; | |||
| @(vif.mas_dr); | |||
| @(vif.driver); | |||
| end | |||
| read_data.control = 5; | |||